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1、针对Gigabit应用的FPGA高速串行接口Xi1inx的针对Gigabit应用的基本都会集成一些高速串行接旦,统称为GigabitTransceiver(GTx),包括GTP、GTR.GTX.GTH.GTZ.GTY(传输速率不断增加)等,不同系列的FPGA集成的GTX不同,详见表1。表1不同系列FPGA集成的GTx及性能Virtex类型最高性能Gbps收发器最大数量峰值带宽Gbps8,384GbsGTY32.75128U1traSca1e+KintexGTH/GTY16.3/32.7544/323,268GbsU1traSca1e+VirtexU1traSca1eGTH/GTY16.3/30
2、.560/605,616Gb/sKintexU1traSca1eGTH16.3642,086Gb/sVirte-7GTX/GTH/GTZ12.5/13.1/28.0556/96/162,784Gb/sKinte-7GTX12.532800Gb/sArtiX-7GTP6.616211Gb/sZynqU1traSca1e+GTR/GTH/GTY6.0/16.3/32.754/44/283,268GbsZynq-7000GTX12.516400Gb/sSpartan-6GTP3.2851Gb/sGTxtransceiver支持如下高速接口(不同系列,集成度不一样,有些只有在高端系列中才有):CPCI
3、Express,Revision1.1/2.0/3.0;C1OGBASE-R;CInter1aken;C10GbAttachmentUnitInterface(XAUI),ReducedPinextendedAttachmentUnitInterface(RXAUI),100GbAttachmentUnitInterface(CAUI),40GbAttachmentUnitInterface(X1AUI);CCommonPacketRadioInterface(CPRI)/OpenBaseStation;ArchitectureInitiative(OBSAI);COC-48/192;COTU
4、-1,0TU-2,OTU-3,OTU-4;CSeria1RapidIO(SRIO);CSeria1AdvancedTechno1ogyAttachment(SATA)/Seria1AttachedSCSI(SAS);CSeria1Digita1Interface(SDI);CSFF-8431(SFP+)0GTX收发器采用的是差分值号对数据进行传输,其中1VDS(1oWVo1tageDifferentSigna1)和CM1(CUrrentMOde1ogiC)是常用的两种差分信号标准。GTx接收和发送方向均由PCS和PMA两部分组成,PCS提供丰富的物理编码层特性,如8b10b编码等;PMA部分为
5、模拟电路,提供高性能的串行接口特性,如预加重与均衡。不同系列的GTx,集成的PCS和PMA的功能不一样,越高端的系列,集成的功能越多,传输的速率越快。下表为最机的GTY集成的PCS和PMA的功能。GTYTransceiverFeaturesGroupFeaturePCS2-byte,4-byte,and8-byteinterna1datapathtosupportdifferent1ineraterequirements8B10Bencodinganddecoding128B130BencodinganddecodingforPC1ExpressKGe3Commadetectionandbyt
6、eandworda1ignmentPRBSgeneratorandcheckerTXphaseFIFORXe1asticFIFOforc1ockcorrectionandchanne1bondingBufferbypasssupportforfixed1atencyProgrammab1e1ogicinterface100Gbattachmentunitinterface(CAUI)supportNativemu1ti-1anesupportforbufferbypassTXphaseinterpo1atorPPMcontro11erforexterna1vo1tage-contro11edc
7、rysta1osci11ator(VCXO)rep1acementPMATwoshared1Ctankphase-1ocked1oops(P11s)perQuadforbestjitterperformanceOneringP11perchanne1forbestc1ockingf1exibi1ityPower-efficientadaptive1inearequa1izermodeca11edthe1ow-powermode(1PM)withautoadapt15-tapDecisionFeedbackEqua1izer(DFE)withAutoAdaptTXpre-emphasisProgrammab1eTXoutputBeaconsigna1ingforPCIExpressdesignsOut-of-band(OOB)signa1inginc1udingCOMsigna1supportforSeria1ATA(SATA)designs1ineratesupportupto30.5Gb/sforUItraScaIeFPGAsand32.75Gb/sf谆虻助手U1traSca1eFPGAs黄飞