电子元器件封装图示大全.docx

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1、电子元器件封装图示大全LQFP 100LMETAL QUAD 100LPQFP 100LQFPQuad Flat PackageQFPQuad Flat PackageTQFP 100LRIMMRIMMFor DirectRambusS8GASBGASC-70 5LSIMM30SIMM72SDIPSIMM30PinoutSIMM30Single In-line MemoryModuleSIMM72PinoutSIMM72工.Single In-line MemoryModuleSIMM72IPP 32MBL 50ns EDOSingle In-line MemoryModuleSIPSingl

2、e Inline PackageSL0T1For intel Pentium II PentiumIII & Celeron CPUSLOT AFor AMD Athlon CPU1 1,1-H I. I 一一JJUUnUUIJUUUUUUUtlUUUUUUUUUJ UUUUUUUUUUHUUUUUUUUUUUUUUUUUUUUnUlQPJr*I一(flnnnnnnnimnnnnnnnnnnTinnn mnnnnnnnnnnnnnnnnrinnnnnrinnnrinnnrnlYyffTnSNAPTKSO DIMMSmall Outline Dual In-lineMemory ModuleA：

3、( I 4 4( 1* (爸皂早:=2-=三 ftHJmMrc A-亥- .u*匕三aB-h-AS2H三5=:二3rhs-&=2一二二一soSmall Outline PackageSOCKET 370For intel 370 pin PGAPentium III & Celeron CPUSOCKET 423For intel 423 pin PGAPentium 4 CPUSOCKET 462/SOCKET AFor PGA AMD Athlon &Duron CPUSOCKET 7For intel Pentium & MMXPentium CPUSOHSOJ 32LSOT143STO

4、-220SOT220SOT220SOT223SOT223SOT23SOT23/SOT323SOT25/SOT353SOT26/SOT363SOT343SOT523Socket 603FosterLAMINATE TCSP 20LChip Scale PackageTO18TO220TO247TO252TO263/TO268TO264T03T05TO52T071TO72Thin Shrink Outline PackageTO78T08TO92TO93TO99TSOPThin Small Outline PackageTSSOP or TSOP IILAMINATE UCSP 32LChip S

5、cale PackageuBGAMicro Ball Grid ArrayuBGAMicro Ball Grid ArrayZig-Zag Inline PackageVL BusVESA Local BusXT Bus8bitZIPGull Wing LeadsHSOP-28HSOP28ISAIndustry StandardArchitectureITO220IT03pJ-STDJEPJ-STDJointI PC/ JEDECStandardsJEPJEDEC PublicationsJESDJESDJEDEC StandardsJLCC24LCCLDCCLGALLP 8LaLQFPPCD

6、IPPCI 32bit5VPeripheraB|RM|IR|l|l|R|R|ipl|l|ipllP|iPRffPHPIFII9P星LWWWWWWWWVWV，”,InterconnectPCI 64bit3.3VPeripheraiiiniimi i mi 11 ii i ii ii ii hum ii i in in hi i it tut mi ini iiimihiiiihirrmnnmi mvmimmnininiiiiniiiYiiviiifniiinivra vmiinfiunntumutii H n biHi MillllklllHHHHi iHHIt Hllllli II llll

7、llt HlllfelllHilll邮 dRg 1ntInterconnectPCMCIAPDIP24:然现赛PS/2PGAPlasticPin GridArrayPLCCPQFPPS/2mouseportpinoutPSDIPDIMM 168UliDIMM DDRDIMM168Dual In-lineMemoryModuleDIMM168DIMM168PinoutDIMM184二 TnTnTmTnTnrmmTnnTgTmTigMnrmYmYmrrmTnTiTnTnTnTnTnTnTmTnTri./itDUJjmnmiininmmwnwwFmufrmT 山iMnniihmTnHimuiruTm

8、iwHKdnTrnmnTnYmmmTmYmYmmiJbcmrfflrmTmTfrmTmrrrmrfflTrnTmrfmTrnTftiMMi.L- a，mb mm ajim 一一 一 /Q八州 ，区 For DDRSDRAMDual In-lineMemoryModuleDIPDual InlinePackageDIP-tabDual InlinePackagewith MetalHeatsinkEIAJEDECformulated EIAStandardsEISAFBGAFDIPAC97FTO220Flat PackAC97v2.2 specification详细规格AGP 3.3VAcceleratedGraphics PortSpecification 2.0详细规格AGP PROAcceleratedGraphics PortPROSpecification1.01详细规格AGPAcceleratedGraphics PortSpecification 2